1. Technical Field
The invention relates to an interconnect substrate, a method of manufacturing an interconnect substrate, and a semiconductor device.
2. Related Art
Semiconductor devices have been proposed in which a semiconductor chip is electrically connected to an interconnect substrate through solder balls.
Japanese Unexamined Patent Publication No. 2000-40764 (see FIG. 6) discloses a semiconductor device including a substrate 111, electrode pads 113 that are formed on the substrate 111, a solder resist film 115 that covers the edge of the electrode pad 113, a semiconductor chip 121, and solder balls 119 that connect the semiconductor chip 121 and the electrode pads on the substrate 111, as shown in FIG. 7.
A plating film (not shown) having high wettability with solder is formed between the solder ball 119 and the electrode pad 113 on the substrate 111. The semiconductor chip 121 is mounted on the substrate 111 with the solder balls 119 interposed therebetween, and a heat treatment, which is called reflow, is performed to electrically connect the semiconductor chip and the substrate.
However, the technique disclosed in Japanese Unexamined Patent Publication No. 2000-40764 has the following problems.
As a result of the reflow, the solder moves to the semiconductor chip 121, as shown in FIG. 6, which results in a connection defect between the substrate 111 and the semiconductor chip 121. As a result, the connection reliability of products is reduced.